TSMC tells partners to move to new smaller processing standards

Stefan Mileschin · 1st July 2022, 08:12

Time to abandon 40nm and larger

While TSMC makes about a quarter of its cash from chips which use technology so old that they are steam driven, it has had enough and is "strongly encouraging" its customers on its oldest (and least dense) nodes to migrate some of their mature designs to its 28 nm-class process technologies.

According to Anandtech, the days of 40 nm and larger nodes are apparently winding down at TSMC and it is happy to let its rivals get the business. UMC gets 80 per cent of its revenue on 40 nm higher nodes, whereas 81.4 per cent of SMIC's revenue comes from outdated processes.

Mature nodes are cheap, have high yields, and offer sufficient performance for simplistic devices like power management ICs (PMICs). But the cheap wafer prices for these nodes come from the fact that they were once, long ago, leading-edge nodes themselves, and that their construction costs were paid off by the high prices that a cutting-edge process can fetch.

https://fudzilla.com/news/55074-tsmc...sing-standards

1st July 2022, 08:12	#1
Stefan Mileschin [M] Reviewer Join Date: May 2010 Location: Romania Posts: 153,575	TSMC tells partners to move to new smaller processing standards Time to abandon 40nm and larger While TSMC makes about a quarter of its cash from chips which use technology so old that they are steam driven, it has had enough and is "strongly encouraging" its customers on its oldest (and least dense) nodes to migrate some of their mature designs to its 28 nm-class process technologies. According to Anandtech, the days of 40 nm and larger nodes are apparently winding down at TSMC and it is happy to let its rivals get the business. UMC gets 80 per cent of its revenue on 40 nm higher nodes, whereas 81.4 per cent of SMIC's revenue comes from outdated processes. Mature nodes are cheap, have high yields, and offer sufficient performance for simplistic devices like power management ICs (PMICs). But the cheap wafer prices for these nodes come from the fact that they were once, long ago, leading-edge nodes themselves, and that their construction costs were paid off by the high prices that a cutting-edge process can fetch. https://fudzilla.com/news/55074-tsmc...sing-standards

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