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TSMC's 3D Stacked SoIC Packaging Making Quick Progress
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Old 3rd June 2024, 06:22   #1
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Default TSMC's 3D Stacked SoIC Packaging Making Quick Progress

TSMC's 3D-stacked system-on-integrated chips (SoIC) advanced packaging technologies is set to evolve rapidly. In a presentation at the company's recent technology symposium, TSMC outlined a roadmap that will take the technology from a current bump pitch of 9μm all the way down to a 3μm pitch by 2027, stacking together combinations of A16 and N2 dies.

https://www.anandtech.com/show/21414...-pitch-in-2027
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