PCI Express 4 in the Works: Set to Achieve 16Gb/s per Lane

jmke · 28th June 2011, 10:02

Even though PCI Express 3.0 is still several months away, PCI Express 4.0 is already in the works and some basic specifications of the interconnection technologies are already known. The maximum bandwidth of the fourth generation of PCIe interconnect will be 16GT/s per lane. There will also be a number of new features implemented.

"The initial report we got yesterday is a PCI Express 4.0 is feasible - we have to work out the details, but it is feasible," said Al Yanes, president of the PCI SIG, reports EETimes.

The group, which leads the development, includes AMD, Hewlett-Packard, IBM and Intel. It is reported that the companies are already conducting simulations using chip, channel, packet and socket data. Currently they reportedly expect to achieve speed of at least whopping 16GT/s per lane (which means 256Gb/s [32GB/s] bandwidth for PCI Express x16 slots). The target speed spec is projected to be delivered by the end of 2011.

http://www.xbitlabs.com/news/other/d..._per_Lane.html

28th June 2011, 10:02	#1
jmke Madshrimp Join Date: May 2002 Location: 7090/Belgium Posts: 79,022	PCI Express 4 in the Works: Set to Achieve 16Gb/s per Lane Even though PCI Express 3.0 is still several months away, PCI Express 4.0 is already in the works and some basic specifications of the interconnection technologies are already known. The maximum bandwidth of the fourth generation of PCIe interconnect will be 16GT/s per lane. There will also be a number of new features implemented. "The initial report we got yesterday is a PCI Express 4.0 is feasible - we have to work out the details, but it is feasible," said Al Yanes, president of the PCI SIG, reports EETimes. The group, which leads the development, includes AMD, Hewlett-Packard, IBM and Intel. It is reported that the companies are already conducting simulations using chip, channel, packet and socket data. Currently they reportedly expect to achieve speed of at least whopping 16GT/s per lane (which means 256Gb/s [32GB/s] bandwidth for PCI Express x16 slots). The target speed spec is projected to be delivered by the end of 2011. http://www.xbitlabs.com/news/other/d..._per_Lane.html __________________

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