Memory Maker Says It Has Tested World’s First Chip for FB-DIMMs: Next-gen PC Memory

jmke · 11th August 2004, 12:05

Infineon Technologies said this week it had completed internal testing of its buffer chip intended to serve in fully-buffered DIMMs when they are available throughout the next couple of years.

The Infineon’s advanced memory buffer (AMB) test chip implements for the first time the crucial high-speed input/output stages together with other high-speed functionality such as the data-insertion and data-forwarding circuits in Infineon’s own logic process technology. The FB-DIMM standard foresees a data multiplexing by a factor of six to higher speeds to reduce the physical width of the memory channel and to minimize the throughput latency. The Jedec standard defines a maximum required datarate per IO pin of 4.8Gb/s for DDR2 800MHz. Infineon’s AMB test chip already runs at 6.0Gb/s, giving substantial system margin and ensuring lowest bit-error rates, the company said.

more: http://www.xbitlabs.com/news/memory/...811020037.html

11th August 2004, 12:05	#1
jmke Madshrimp Join Date: May 2002 Location: 7090/Belgium Posts: 79,022	Memory Maker Says It Has Tested World’s First Chip for FB-DIMMs: Next-gen PC Memory Infineon Technologies said this week it had completed internal testing of its buffer chip intended to serve in fully-buffered DIMMs when they are available throughout the next couple of years. The Infineon’s advanced memory buffer (AMB) test chip implements for the first time the crucial high-speed input/output stages together with other high-speed functionality such as the data-insertion and data-forwarding circuits in Infineon’s own logic process technology. The FB-DIMM standard foresees a data multiplexing by a factor of six to higher speeds to reduce the physical width of the memory channel and to minimize the throughput latency. The Jedec standard defines a maximum required datarate per IO pin of 4.8Gb/s for DDR2 800MHz. Infineon’s AMB test chip already runs at 6.0Gb/s, giving substantial system margin and ensuring lowest bit-error rates, the company said. more: http://www.xbitlabs.com/news/memory/...811020037.html __________________

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