JEDEC Publishes Wide IO 2 Mobile DRAM Standard

Stefan Mileschin · 9th September 2014, 09:47

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD229-2 Wide I/O 2. Wide I/O 2 offers a significant speed increase over Wide I/O, while retaining Wide I/O's vertically stacked through silicon via (TSV) architecture and optimized packaging. Combined, these characteristics position Wide I/O 2 to deliver the ever-increasing speed, capacity, and power efficiency demanded by mobile devices such as smartphones, tablets and handheld gaming consoles. JESD229-2 may be downloaded free of charge from the JEDEC website here.

Wide I/O 2 provides four times the memory bandwidth (up to 68GBps) of the previous version of the standard, but at lower power consumption (better bandwidth/Watt) with the change to 1.1V supply voltage. From a packaging standpoint, the Wide I/O 2 die is optimized to stack on top of a system on chip (SOC) to minimize power consumption and footprint.

http://www.techpowerup.com/204994/je...-standard.html

9th September 2014, 09:47	#1
Stefan Mileschin [M] Reviewer Join Date: May 2010 Location: Romania Posts: 153,541	JEDEC Publishes Wide IO 2 Mobile DRAM Standard JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD229-2 Wide I/O 2. Wide I/O 2 offers a significant speed increase over Wide I/O, while retaining Wide I/O's vertically stacked through silicon via (TSV) architecture and optimized packaging. Combined, these characteristics position Wide I/O 2 to deliver the ever-increasing speed, capacity, and power efficiency demanded by mobile devices such as smartphones, tablets and handheld gaming consoles. JESD229-2 may be downloaded free of charge from the JEDEC website here. Wide I/O 2 provides four times the memory bandwidth (up to 68GBps) of the previous version of the standard, but at lower power consumption (better bandwidth/Watt) with the change to 1.1V supply voltage. From a packaging standpoint, the Wide I/O 2 die is optimized to stack on top of a system on chip (SOC) to minimize power consumption and footprint. http://www.techpowerup.com/204994/je...-standard.html

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