The sneak peeks from the upcoming IEEE Solid State Circuit Conference continues, as the agenda items unveil interesting tech that will be either unveiled or demonstrated there. Intel, Synopsys, and Marvell, are leading providers of DRAM physical layer interface (PHY) IP. Various processor, GPU, and SoC manufacturers license PHY and memory controller IP from these companies, to integrate with their designs. All three companies are ready with over 200 Gbps around the 2.69 to 3 petajoule per bit range. This energy cost is as important as the data-rate on offer; as it showcases the viability of the PHY for a specific application (for example, a smartphone SoC has to conduct its memory sub-system at a vastly more constrained energy budget compared to an HPC processor).
https://www.techpowerup.com/318444/i...s-finfet-nodes
Intel, Marvell, and Synopsys to Showcase Next-Gen Memory PHY IP Capable of 224 Gbps
30th January 2024, 07:30
Intel, Marvell, and Synopsys to Showcase Next-Gen Memory PHY IP Capable of 224 Gbps 
