Stefan Mileschin

Intel has recently updated its developer documentation for instruction set extensions, and in the process has disclosed information on both new instructions for and the codename of its next-generation low-power processor microarchitecture. Dubbed "Tremont", the forthcoming processor core look to replace Goldmont Plus in the upcoming Atom, Celeron, and Pentium Silver-branded SoCs.

According to the Intel Architecture Instruction Set Extensions (ISE) and Future Features Programming Reference document, the Goldmont Plus microarchitecture will not be the end of the road for Intel’s low-cost/low-power cores. In the coming years it will be succeeded by the codenamed Tremont microarchitecture and its successors. On the manufacturing side of matters, nothing has officially been disclosed, but right now our suspicion is that processors based on the Tremont will be made using the company’s 10 nm process technology. To date we haven't seen Intel use their enhanced “+” and “++” 14nm process technologies to make SoCs for entry-level and energy-efficient PCs - as the original 14nm provides better density - so it seems unlikely that Intel would start now.

A key question about the Tremont is what architecturaly improvements it will bring. While Intel's document does specify the new instructions, it doesn't offer any general architectural insight. Intel's general trend thus far since Silvermont has been to gradually widen their out-of-order execution design, starting with two-way, moving to three-way (Goldmont), and then to a three-way front-end plus a four-way allocation and retirement backend. So it may be that we see Intel go this route, as they already have a number of tricks left in their bag from Core, and it meshes well with the high density aspects of their 10nm processes, which favors more complex processors.

As for the ISE improvements, Intel’s Tremont will feature CLWB, GFNI (SSE-based), ENCLV, and Split Lock Detection instruction set extensions, which are also set to arrive with Intel’s Ice Lake processors. Also set to arrive with Tremont will be CLDEMOTE, direct store, and user wait instructions (see details in the table below). Unlike the earlier instructions, these are unique to Tremont and are not scheduled to be supported by the Ice Lake (or other documented Intel’s cores).

https://www.anandtech.com/show/12648...-goldmont-plus