Stefan Mileschin

End of an error

Intel is going to be disabling Transactional Synchronization Extensions (TSX) by default for various Skylake through Coffee Lake processors with forthcoming microcode updates, according to Phoronix.

Transactional Synchronization Extensions (TSX) have been around since Haswell for hardware transactional memory support. Going off Intel’s past numbers TSX can be about 40 percent faster in specific workloads or as much as five times faster in database transaction benchmarks.

However, TSX issues are rather good for possible side-channel timing attacks that could lead to KASLR being defeated and CVE-2019-11135 (TSX Async Abort) for an MDS-style flaw.

Intel is disabling TSX by default across multiple families of Intel CPUs from Skylake through Coffee Lake. The Linux kernel is preparing for this microcode change, as seen in the flow of new patches this morning for the 5.14 merge window.

A memory ordering issue is what is reportedly leading Intel to now deprecate TSX on various processors. An Intel whitepaper outlines the problem. The memory ordering issue has been known to Intel since October 2018 but only now in June 2021 are they pushing out microcode updates to disable TSX by default.

https://fudzilla.com/news/pc-hardwar...tsx-by-default