Hynix slides tease vertically stacked memory with 256GB/s of bandwidth

Stefan Mileschin · 1st October 2014, 08:18

High-Bandwidth Memory, otherwise known as HBM, is a form of stacked DRAM designed to sit on the same package as a processor. Hynix has been working on the technology with AMD, and there's already a JEDEC standard governing the interface. Now, official-looking Hynix presentation slides linked on Reddit provide new insight into how this stacked memory works—and what the future holds.

According to the slides, Hynix's first-gen implementation stacks four DRAM dies on top of a single base layer. The dies are linked by vertical channels called through-silicon vias. By my count, there are 256 of those per slice, each one ...

http://techreport.com/news/27129/hyn...s-of-bandwidth

1st October 2014, 08:18	#1
Stefan Mileschin [M] Reviewer Join Date: May 2010 Location: Romania Posts: 153,575	Hynix slides tease vertically stacked memory with 256GB/s of bandwidth High-Bandwidth Memory, otherwise known as HBM, is a form of stacked DRAM designed to sit on the same package as a processor. Hynix has been working on the technology with AMD, and there's already a JEDEC standard governing the interface. Now, official-looking Hynix presentation slides linked on Reddit provide new insight into how this stacked memory works—and what the future holds. According to the slides, Hynix's first-gen implementation stacks four DRAM dies on top of a single base layer. The dies are linked by vertical channels called through-silicon vias. By my count, there are 256 of those per slice, each one ... http://techreport.com/news/27129/hyn...s-of-bandwidth

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