Stefan Mileschin

804MB of total cache per socket

AMD has unveiled its 3rd gen AMD EPYC Milan-X CPU, a beast with 3D V-Cache, up to 64 Zen 3 cores, and an 804MB of total cache per socket, promising up to 50 percent average uplift across targeted workloads.

During its Accelerated Data Center keynote, AMD unveiled the Milan-X, an updated 3rd gen EPYC with 3D V-Cache. While it won't bring any significant architecture updates compared to the Milan CPUs, the 3D V-Cache is promising significant performance improvements.

The AMD EPYC Milan-X update will bring stacked L3 cache, raising the amount of cache per chiplet from 32MB to 96MB, offering 3x higher cache compared to previous 3rd gen Milan EPYC CPUs.

In short, a 64-core version of the Milan-X CPU, with eight 8-core chiplets, will pack a total of 768MB of L3 cache, or 804MB of total cache per socket.

Of course, it is SP3 socket compatible, but AMD was not keen to talk about any other details, including frequency, power, or the price, but with the Milan-X being a rather unique product on the market, AMD certainly has the upper hand.

AMD is partnering with Microsoft, which will showcase its Azure HBV3 Series VMs with Milan-X and AMD was keen to note that other major OEM partners like Dell, Cisco, HPE, Lenovo, Supermicro, and others, are lining up for the launch which is expected in the first quarter of 2022.

https://fudzilla.com/news/53841-amd-...ith-3d-v-cache