In the stock tests we saw some anomalies or maybe we can refer to them as surprising results. Time to dig a bit deeper into the bios of our Gene V board to see where the culprit is at. As you can see in the below bios screenshots the tweaking options are massive.

Normally most users just touch the main timings to unleash a bit more performance ( CAS latency, TRAS, TRP and Command Rate ). Some daredevils go deeper and start to fiddle with eg TRFC and other subtimings to max out their system's performance. As being part of the tweaking community we tested a lot and the alteration of the below values gave us the best boost for a daily basis. Secondly some explain the "bugged" readouts we encountered when testing this high end RAM kit on Ivy Bridge.

We will start our tweaking adventure from the stock XMP profile of our TridentX kit : 2666Mhz 11-13-13-35 Command rate 2T.

We work our way down and change each setting accordingly to what we have deemed to be stable for our sample kit:

• Tighten Command Rate from 2T to 1T
• Tighten tRRSSR to 4 (set at 5 by Bios )
• Lower TRFC from 214 to 174 ( can be lowered even further )
• Tighten eg TRTP (set at 10 by Bios )
• Tighten tWWSR from bios auto setting of 7 to 5
  

On the left the XMP profile. On the right the tweaked setup

Note that further tweaking can be done, but our kit remained HCI memtest stable with the above timings/tweaks and still being run at the stock rated voltage of 1.65Vdimm. Tightening eg TRFC any further would end up in errorring out. It all will depend on your specific RAM kit how far you can go. But the above tweaks will already give you a nice head start.

In Superpi 32M we see a nice time gain with adjusting the Command Rate to 1. This is usually very dependant on the quality of your ram sticks. Lowering the tRRSSR from 5 to 4 nibbles off another 0.7 seconds.4 is the lowest value for tRRSSR, as setting to 3 will result in performance typical of a 7setting. TRFC 174 iso 214 jields a similar gain in Pi 32M as the tRRSSR tweaking. Furthermore tightening TRTP to 8, shaves off another 0.2 seconds. Finally the tWWSR secondary timing tops it all off. In total the gain was 3.5 secs over the XMP profile. Not bad at all, achieved by adjusting 5 settings. The below AIDA bandwith tests nicely display the tweaking effects. Recalling the AIDA 28000MB/s COPY readout from the previous page. tWWSR is the key value to drastically improve bandwith in that segment.

How this tweaking will affect your daily run programs or games is debatable. But a bit more performance or speed never hurts does it ? And it's absolutely free, in fact it just takes some time to fine tune and thoroughly test it for stability.

Our kit wasn't stellar in the timing department. TRCD could hardly be tightened, 2800C11-13-13 was plus minus SuperPi 32m stable, though would fail HCI memtest in under a few seconds. 2800C11-14-14-35 2T at 1.67Vdimm was stable however. Command rate 1T failed HCI memtest again, even at 1.75Vdimm.

For fun we tested how high this high end ram kit could run on our i7-3770K. 2900Mhz C11-14-14-35 Command Rate 2T was SuperPi 32m stable at 1.72Vdimm. The setup hard locked at 2920Mhz ram speeds, the CPU's Integrated Memory Controller (IMC) capped out.